CS501 - Advanced Computer Architecture finalterm paper

5 marks question
Define RAID 0
Calculate bandwidth
Discuss problems of Pipelining

3 marks questions
Differenciate Shared Medium and Switched Medium
R[ra] = R[rb] - R[rc] Discuss its functionality
Serial and Parallel data transfer
Cache Direct Memory access approach
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2 marks questions
How you define microprogramming
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Interrupt driven I/O
In Bus topology if we change bus to switch then what will happen

MCQ
RAID related 4-5
ISR related 4-5
Interrupt driven I/O 2-3
Cache 2-3
RISC and CISC 2

Today is my paper
52 total question
40 one no mcq
what is ISA, explain ? 5 marks
how instruction set is defined 5 marks
virtualposition.forumotion.net
one numircal 2 marks?
mostly mcq from the old papers........about 60%

My ppr was on 11th feb.
all is nt remembrd bt however sum is still in mind.
differentiate b/w RISC n CISC according to their instruction size and hardware, software? 5 marks.
find total capacity of hard disk. (it was the same example that is on page no. 304 examle no 3 of our handouts.) 5 marks.
virtualposition.forumotion.net
what is the finction of Cntrol unit? 3 marks.
what is the difference between control unit n data path? 2 marks
what is the working of DMA controller? 5 marks
define 64K x 1 static RAM chip? 5 marks.
total were 52 questions. Mcqs were quite easy. bt...

mcqs were very tough 10 to RAID me se thay or wo jo handouts mein nahi book se zarroor parh lena ye topic

(2)
where TCP/IP Used??
difference bw IP n PC
define PROM

(3)
STAGes in pipelined SRC
diff bw serial and parallel transfer
configuration of 1x8 memory
Consider a 4 way set-associative cache with 256KB capacity and 32 byte lines
a) How many sets are there in the cache?
b) How many bits of address are required to select a set in cache?

5)

what is meant by abstraction from the user details by the operating system( YE KISI KO ATA HAI?)
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difference bw connection oriented and connection less
compare 1D AND 2D
write RTL for five instructions( TOTALLY DISAPPOINTED)
movi R3,45
In R3,57
OUT R6 15
RET R3 ANDI R5 , R4. 5

CS501 - Advance Computer Architecture(My paper on 19-02-11)

Postby admin » Sat Feb 19, 2011 7:29 pm
Format of the 1-Address instruction set-----2 Marks

What attributes should have a device to qualify in order to be master device ---- 2 Marks

What is mean when we use representation sing number in sing magnitude form? 2 Marks

A network is suing the Bus topology if we replace the bus with switch what change will be take effects by this configuration…. 2 Marks
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What is ISA explain….. 2 marks

Explain the relation ship between the Hard disk tracks, cylinders and sectors…3 marks
Explain 1bit half adder function ……3 marks

SRS assembly program for the following expiration..5 Marks
Z = 13(A+B)-32(c-58)

Latency of the ram is 30ns , if the time charge is 10ns and data pre change is 3 byte then find the band width…5 Mrks

Compare the 1 x 8 bit Memory (1D) and 4 x 8 Memory (2D) 5 marks

My Paper 23 Feb
1. Consider the following floating point’s numbers 3 marks -0.5 X 10-3 , Find out the sign, significant and exponent
a. -0.5 × 10-3
b. Sign = -1
c. Significand= 0.5
d. Exponent= -3
e. Base = 10= fixed for given type of representation
f. Significand is also called mantissa.
g. 2-address instruction
(1) • The code size is 7 bytes (1+3+3 = 7 bytes)
(2) • Number of bytes accessed from memory is 16(7 bytes for instruction fetch + 6 bytes for source operand fetch + 3 bytes for storing destination operand = 16 bytes)
2. An entire _____ memory can be erased in one or a few seconds which is much faster than EPROM.
a. PROM
b. Cache
c. EEPROM
d. Flash Memory
3. _______ indicate the availability of page in main memory.
a. Access Control Bits
b. Used Bits
c. Presence Bits
d. None of the given
4. Consider a LAN, using bus topology. If we replace the bus with a switch, what change will occur in such a configuration?
5. Differenciate between Spatial Locality And Temporal Locality .
6. Write an assembly language program using the SRC assembly language to evaluate the expression:
Z= 4(a + b) - 8(27 + c)
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